This site uses cookies to help make it more useful and reliable. Our Cookies page explains what they are, which ones we use, and how you can manage or remove them. — Don't show this message again

CBC - The CMS Binary Chip
12 Sep 2018
Yes
-  

 

 

As part of the CMS Tracker, the CBC will provide high-quality physics data while operating at the x10 higher luminosity delivered by the LHC upgrade

Yes
Closeup of the CMS Binary Chip

​​​

 

Upgrades to the Large Hadron Collider ( LHC ) at CERN will increase its luminosity by a factor of 10, providing a higher rate of collisions, and correspondingly more data for the experiments. This allows physicists to study known particles such as the Higgs boson in greater detail, as well as search for new rare phenomena. This High-Luminosity LHC (HL-LHC) is expected to produce at least 15 million Higgs bosons per year, compared with three million measured in 2017. ​

A top view of a single CBC integrated circuit showing the upper layer of metal interconnect tracks and the array of pads used to connect the chip to the module circuit board.
A single CBC ASIC (5x11mm)​

Higher luminosity requires the experiments to operate at further elevated beam intensities and particle collision rates, making it necessary to upgrade the detectors and electronics at the heart of the experiments. Consequently, the CMS Binary Chip (CBC) was designed and developed as a replacement for the APV25 ASIC used in the original Silicon Tracker of the CMS experiment​ .

​Designed in a 130nm CMOS technology, the CBC is a 254 channel readout ASIC with each channel comprised of a pre-amplifier, shaper, and a comparator that converts the analogue signals into binary 1s and 0s..

The binary data is stored in a 512-deep pipeline memory to accommodate trigger latencies of up to 12.8 microseconds, more than treble those of the original experiment. When triggered, the binary data from the pipeline is output as a serial packet at 320 Mb/s in order to satisfy an expected average trigger rate of 1MHz .
​
​
A top view of a prototype module containing 16 CBC integrated circuits connected either side of 4 silicon strip detectors, of which only the top 2 detectors are visible.​
A full size 2S module prototype​
STFC

In an innovative move to assist with the identification of the most interesting events, each detector module will use an array of 16 CBC chips to collect signals from two layers of silicon microstrip sensors arranged with a gap of a few millimetres between them. As particles pass through these sensors they will deposit electrical charge in both layers, and by comparing the relative positions of the charge in each layer, the logic circuits on the CBC can identify potentially interesting data that can t​hen be used in the experiment’s first level of trigger processing.​

Imperial_Logo.pngThis work was carried out in collaboration with Imperial College London, with funding from STFC​.


Contact: ASIC Design Group
Tel: 01235446017​
Contact:  

Loading